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98.705 DIGITAL SYSTEM DESIGN WITH VHDL ( TA ) 3-2-0
Module I Multi input digital system design methodology - formulation of requirements and specifications of the system - timing and frequency considerations - functional partitioning state machine representation - state assignment implementation with flip -flops - design of asynchronous machines - role of VHDL in digital system design.
Module II Basic syntax of VHDL - entity-architecture - bit vectors - signal assignments - structural, behavioral & data flow modelling with examples like counters, bit comparators, registers, multiplexers etc. - data objects & types - generics - subprograms - functions.
Module III State machine representation in VHDL - Moore & Melay machines - One hot encoding - interacting state machine representation - case study of a memory controller - introduction to test bench generation - fault tolerance - introduction to CPLD, FPGA & design with CPLD and FPGA.
Text Books : -
1. Nawabi. VHDL : Analysis and Modelling of Digital Systems., 2nd ed., Mc
Graw Hill.
2. Kevin Skalill. VHDL for Programmable Logic, Addison & Wesley.
3. W I Fletcher . An Engineering Approach to Digital Design, Prentice Hall of
India.
4. Douglas Perry. VHDL, Mc Graw Hill.
5. VHDL, IEEE Standard Reference Manual.
Question Paper : -
The question paper will consist of two parts. Part I is to cover the entire syllabus, and carries 40 marks. This will contain 10 compulsory questions of 4 marks each. Part II is to cover 3 modules, and carries 60 marks. There will be 3 questions from each module (10 marks each) out of which 2 are to be answered.